Design-Reuse13h
Defining the software/hardware interface: A new paradigm enabled by Codasip Studio Fusion
Before there was a mainstream open standard Instruction Set Architecture (ISA) like RISC-V, a computer processor’s ...
Design-Reuse5h
SureCore announces low power cryogenic memory technology that could help dramatically cut data centre power usage
One of the big challenges with data centres is amount of power that they consume. This is being further exacerbated by the ...
Design-Reuse7h
New LZ4 & Snappy IP Core from CAST Enables Fast Lossless Data Decompression
The new LZ4SNP-D LZ4/Snappy Data Decompressor IP core receives compressed data files, detects the LZ4 or Snappy format, ...
Design-Reuse40m
Codasip introduces best-in-class RISC-V core for power-efficient applications
Codasip L110 delivers up to 50% improvements in performance per watt and 20% smaller code size compared to similar cores in the market ...
Design-Reuse1h
Raspberry Pi Selects Hailo to Enable Advanced AI Capabilities for Raspberry Pi 5
Hailo, the pioneering chipmaker of edge artificial intelligence (AI) processors, today announced that it has been selected by Raspberry Pi to provide AI accelerators for the Raspberry Pi AI Kit, the ...
Design-Reuse7h
LZ4/Snappy Data Decompressor
LZ4SNP-D is a custom hardware implementation of a lossless data decompression engine for the LZ4 and Snappy compression algorithms. The core receives compressed files, automatically detects the LZ4 or ...